Embedded Real Time Network Multimedia Data Transmission Method

Authors

Zaijian Wang, The College of Physics and Electronic Information, Anhui Normal University, Wuhu 241000, China;
Ting Wan, The College of Physics and Electronic Information, Anhui Normal University, Wuhu 241000, China;
Dandan Wu, The College of Physics and Electronic Information, Anhui Normal University, Wuhu 241000, China;
Qingqing Xing, The College of Physics and Electronic Information, Anhui Normal University, Wuhu 241000, China;

Abstract

Abstract: To improve the speed of data acquisition and real-time video transmission, Filed Programmable Gate Array (FPGA) as the core processor, the Verilog HDL was used to describe the circuit function realization to realize the high-speed access of Synchronous Dynamic Random Access Memory (SDRAM) based on a typical network real-time transmission network multimedia service data. The new high-speed real-time transmission of video data took full advantage of the characteristics of FPGA parallel processing to improve video data acquisition and transmission rates. The experimental results demonstrate the effectiveness of the method.

Recommended Citation

Wang, Zaijian; Wan, Ting; Wu, Dandan; and Xing, Qingqing (2020) "Embedded Real Time Network Multimedia Data Transmission Method," Journal of System Simulation: Vol. 29: Iss. 4, Article 14.
DOI: 10.16182/j.issn1004731x.joss.201704014
Available at: https://dc-china-simulation.researchcommons.org/journal/vol29/iss4/14

First Page

808

Revised Date

2015-11-26

DOI Link

https://doi.org/10.16182/j.issn1004731x.joss.201704014

Last Page

817

CLC

TN919.85

Recommended Citation

Wang Zaijian, Wan Ting, Wu Dandan, Xing Qingqing. Embedded Real Time Network Multimedia Data Transmission Method[J]. Journal of System Simulation, 2017, 29(4): 808-817.

DOI

10.16182/j.issn1004731x.joss.201704014