Surrogate Model Based Processor Architectural Design Space Exploration Algorithm

Authors

Hongwei Wang, 1. Beijing Key Laboratory of Mobile Computing and Pervasive Device, Beijing 100190, China; ;2. Institute of Computing Technology,Chinese Academy of Sciences, Beijing 100190, China; ;3. University of Chinese Academy of Sciences, Beijing 100190, China;
Ziyuan Zhu, 1. Beijing Key Laboratory of Mobile Computing and Pervasive Device, Beijing 100190, China; ;2. Institute of Computing Technology,Chinese Academy of Sciences, Beijing 100190, China; ;
Jinglin Shi, 1. Beijing Key Laboratory of Mobile Computing and Pervasive Device, Beijing 100190, China; ;2. Institute of Computing Technology,Chinese Academy of Sciences, Beijing 100190, China; ;
Yongtao Su, 1. Beijing Key Laboratory of Mobile Computing and Pervasive Device, Beijing 100190, China; ;2. Institute of Computing Technology,Chinese Academy of Sciences, Beijing 100190, China; ;
Hongmei Shi, 1. Beijing Key Laboratory of Mobile Computing and Pervasive Device, Beijing 100190, China; ;2. Institute of Computing Technology,Chinese Academy of Sciences, Beijing 100190, China; ;3. University of Chinese Academy of Sciences, Beijing 100190, China;
Zhiguo Liu, 1. Beijing Key Laboratory of Mobile Computing and Pervasive Device, Beijing 100190, China; ;2. Institute of Computing Technology,Chinese Academy of Sciences, Beijing 100190, China; ;3. University of Chinese Academy of Sciences, Beijing 100190, China;

Abstract

Abstract: A novel surrogate model based penalty-distance multi-objective expected improvement (PDMOEI) algorithm was proposed for processor architectural design space exploration (DSE): first using a Kriging interpolation technique to construct a surrogate model, then adopting the surrogate model based PDMOEI algorithm to search the Pareto points and finding the globally multi-objective optimized architectural parameter configurations. The proposed algorithm was compared with the multi-objective expected improvement (MOEI) algorithm, the non-dominated sorting genetic algorithm II (NSGA-II) algorithm and the metamodel-assisted NSGA-II (MA-NSGA-II) algorithm by performing two experiments. Experimental results show that, the proposed algorithm achieves better Pareto points pursuing performance than the other algorithms in both the closeness of the obtained approximating Pareto points to the actual Pareto points and the coverage of the actual Pareto points.

Recommended Citation

Wang, Hongwei; Zhu, Ziyuan; Shi, Jinglin; Su, Yongtao; Shi, Hongmei; and Liu, Zhiguo (2020) "Surrogate Model Based Processor Architectural Design Space Exploration Algorithm," Journal of System Simulation: Vol. 29: Iss. 5, Article 20.
DOI: 10.16182/j.issn1004731x.joss.201705020
Available at: https://dc-china-simulation.researchcommons.org/journal/vol29/iss5/20

First Page

1077

Revised Date

2015-09-14

DOI Link

https://doi.org/10.16182/j.issn1004731x.joss.201705020

Last Page

1085

CLC

TP391.9

Recommended Citation

Wang Hongwei, Zhu Ziyuan, Shi Jinglin, Su Yongtao, Shi Hongmei, Liu Zhiguo. Surrogate Model Based Processor Architectural Design Space Exploration Algorithm[J]. Journal of System Simulation, 2017, 29(5): 1077-1085.

DOI

10.16182/j.issn1004731x.joss.201705020