Infrared Scene Generation Technology Based on Hardware-in-the-loop Simulation of MOS Resistance Arrays

Authors

Shanjun Tang, 1.Shanghai Electro-mechanical Engineering Institute, Shanghai 201109, China; ;
Minmin Song, 2.Shanghai Institute of Spaceflight Control Technology, Shanghai 201109, China;
Biyun Wang, 2.Shanghai Institute of Spaceflight Control Technology, Shanghai 201109, China;
Zhang Yu, 1.Shanghai Electro-mechanical Engineering Institute, Shanghai 201109, China; ;

Abstract

Abstract: To simulate the dynamic infrared scene of infrared guided missile in the hardware-in-the-loop simulation, the researches on the modeling of the target, background and flare and the simulation using MOS resistance arrays are carried out. The infrared countermeasure scene which is applicable to the hardware-in-the-loop simulation is generated by the modeling software, and the infrared radiation model and motion model of the typical target, background and flare are established. The models are verified and corrected by the investigated data of the current main fighters and their infrared flares. The dynamic infrared scene is simulated according to the infrared scene drive software of the MOS resistance arrays in the process of the hardware-in-the-loop simulation. The models are proved to be realistic and credible through engineering application, which improve the level of the validation of the missile interference rejection capacity.

Recommended Citation

Tang, Shanjun; Song, Minmin; Wang, Biyun; and Yu, Zhang (2019) "Infrared Scene Generation Technology Based on Hardware-in-the-loop Simulation of MOS Resistance Arrays," Journal of System Simulation: Vol. 30: Iss. 4, Article 14.
DOI: 10.16182/j.issn1004731x.joss.201804014
Available at: https://dc-china-simulation.researchcommons.org/journal/vol30/iss4/14

First Page

1319

Revised Date

2017-02-15

DOI Link

https://doi.org/10.16182/j.issn1004731x.joss.201804014

Last Page

1327

CLC

TN215

Recommended Citation

Tang Shanjun, Song Minmin, Wang Biyun, Zhang Yu. Infrared Scene Generation Technology Based on Hardware-in-the-loop Simulation of MOS Resistance Arrays[J]. Journal of System Simulation, 2018, 30(4): 1319-1327.

DOI

10.16182/j.issn1004731x.joss.201804014