Dynamic Model of Dual Flux-Controlled Memristor and FPGA Hardware Circuit Realization

Authors

Haoqi Chen, School of Information Engineering, Jiangxi University of Science and Technology, Ganzhou 341000, China;
Xiaohong Zhang, School of Information Engineering, Jiangxi University of Science and Technology, Ganzhou 341000, China;

Abstract

Abstract: Based on the classical Chua’s chaotic circuit, a 5-Dimentional and dual flux-controlled memristive chaotic circuit system is designed. The nonlinear characteristics of the circuit are analyzed numerically and the results show that the circuit has rich chaotic dynamical behavior. The novel memristive continuous system is transformed into digital system by first-order discrete processing. Based on DSP Builder and FPGA technology, a hardware platform of Cyclone Ⅳ E series EP4CE10F17C8N chip realizes the digital system of the model. The design results indicate that the digital memristive system avoids the drift and instability of analog components, the display performance of the hardware waveform is stable and reliable, and is consistent with the computer simulation result.

Recommended Citation

Chen, Haoqi and Zhang, Xiaohong (2020) "Dynamic Model of Dual Flux-Controlled Memristor and FPGA Hardware Circuit Realization," Journal of System Simulation: Vol. 32: Iss. 8, Article 14.
DOI: 10.16182/j.issn1004731x.joss.19-0016
Available at: https://dc-china-simulation.researchcommons.org/journal/vol32/iss8/14

First Page

1531

Revised Date

2019-04-07

DOI Link

https://doi.org/10.16182/j.issn1004731x.joss.19-0016

Last Page

1545

CLC

TP918

Recommended Citation

Chen Haoqi, Zhang Xiaohong. Dynamic Model of Dual Flux-Controlled Memristor and FPGA Hardware Circuit Realization[J]. Journal of System Simulation, 2020, 32(8): 1531-1545.

Corresponding Author

Xiaohong Zhang,

DOI

10.16182/j.issn1004731x.joss.19-0016